ESP8266 - part one

As I said on the previous post, one device that captured my attention is the ESP8266EX chip that is an wireless SoC and it has GPIO, I2C, ADC (0..1V), SPI, PWM.

It runs at 80MHz and has 32KBytes of instruction RAM, 96KBytes of data RAM and 64KBytes boot ROM.

It has a RISC architecture and the core is a 106micro Diamond Standard core (LX3) made by Tensilica and is produced by Espressif.

Specs from the producer site: 

  • 802.11 b/g/n
  • Wi-Fi Direct (P2P), soft-AP
  • Integrated TCP/IP protocol stack
  • Integrated TR switch, balun, LNA, power amplifier and matching network
  • Integrated PLLs, regulators, DCXO and power management units
  • +19.5dBm output power in 802.11b mode
  • Power down leakage current of <10uA
  • Integrated low power 32-bit CPU could be used as application processor
  • SDIO 1.1/2.0, SPI, UART
  • STBC, 1×1 MIMO, 2×1 MIMO
  • A-MPDU & A-MSDU aggregation & 0.4ms guard interval
  • Wake up and transmit packets in < 2ms
  • Standby power consumption of < 1.0mW (DTIM3)
The chip from the above picture is the old version. The new one is ESP8266EX that is now on all boards that I've seen for sales.

ESP8266Ex is connected on most boards to a SPI flash memory like in the following schematic:

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